Mixed Signal CMOS Chip Design

Datum 01.04.2024 bis 15.09.2024
Kosten k. A.
Zielgruppe Hochschulabsolventen
Bildungsart Fortbildung/Qualifizierung
Unterrichtsform E-Learning/ Blended Learning / Virtuelles Klassenzimmer
Abschluss Zertifikat
Präsenzkurs Keine Angabe.
mind. Teilnehmerzahl k. A.
max. Teilnehmerzahl 20
URL des Kurses Details beim Anbieter
spezielles Angebot für Dozenten Keine Angabe.
Veranstaltungsort
 
Online und Universität Ulm
89081 Ulm (Donau)

 

AbendkursBildungsgutscheinFörderfähig nach Fachkursprogramm des ESFBarierrefreier Zugang
k. A.k. A.k. A.k. A.

 

Beschreibung
After successful pass of this course, students understand the working principles of analog and digital circuit simulation techniques. They are able to set up a node admittance matrix from a given circuit and know the working principles and applications of the three main analog simulation types: DC, AC, and transient. They understand linearization of device models and Newton-Raphson integration for solution of differential equations, update and residue criteria, and equilibrium points. Furthermore, they understand process variation and device mismatch and their influence on CMOS circuits and are able to use worst case corner modeling and statistical evaluation methods like Monte Carlo analysis for yield optimization and design centering. They can elaborate the difference between cycle-based and event-driven digital simulation techniques, including half-step simulation and time-wheel scheduling. They are able to use setup- and hold-time constraints as well as contamination- and propagation-delays for calculation of slack times in a static timing analysis and can explain the effect of clock skew and jitter on synchronous circuits. They can elaborate how table-based models and circuit-partitioning is able to significantly speed up simulations and enables mixed-signal verification. They can estimate the tradeoff between manual modeling, compiled-model interface, and coupled co-simulation for mixed-mode analyses. They understand synthesis of combinational and synchronous behavioral hardware description into generic gates. Furthermore, they are able to use the stuck-at fault-model and the D-algorithm in order to analyze testability and include boundary-scan Flip-Flops for improved testability. They know principles of placement and routing of standard-cells including mincut algorithm, maze- and channel-routing, and layout compaction, as well as design-rule-check and layout-versus-schematic-check. They are able to build a clock-distribution network and make use of timing aware placement, as well as build a power-grid and apply I/O-cells in order to improve the reliability of digital
circuits. Finally, they know various bonding-techniques and printed-circuit-board design practices in order to connect the final ASIC to other chips and measurement equipment.

 

Schlagworte
elektrotechnik, simulation, digital, analog, mikrotechnik, sensoren

 

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